Enumerator |
---|
UNKNOWN | |
ADD_LIBRARY | |
ALLOCATION | |
BB_STG_CREATOR | |
CALL_GRAPH_UNFOLDING | |
CDFC_MODULE_BINDING | |
CHORDAL_COLORING_REGISTER_BINDING | |
CLASSIC_DATAPATH_CREATOR | |
DATAPATH_CS_CREATOR | |
DATAPATH_CS_PARALLEL_CREATOR | |
CLASSICAL_HLS_SYNTHESIS_FLOW | |
COLORING_REGISTER_BINDING | |
CONTROL_FLOW_CHECKER | |
C_TESTBENCH_EXECUTION | |
DOMINATOR_ALLOCATION | |
DOMINATOR_FUNCTION_ALLOCATION | |
DOMINATOR_MEMORY_ALLOCATION | |
DOMINATOR_MEMORY_ALLOCATION_CS | |
DRY_RUN_EVALUATION | |
EASY_MODULE_BINDING | |
EVALUATION | |
FSM_CONTROLLER_CREATOR | |
FSM_CS_CONTROLLER_CREATOR | |
FSM_NI_SSA_LIVENESS | |
GENERATE_HDL | |
GENERATE_SIMULATION_SCRIPT | |
GENERATE_SYNTHESIS_SCRIPT | |
HLS_FUNCTION_BIT_VALUE | |
HLS_SYNTHESIS_FLOW | |
HW_PATH_COMPUTATION | |
HW_DISCREPANCY_ANALYSIS | |
INFERRED_INTERFACE_GENERATION | |
INITIALIZE_HLS | |
INTERFACE_CS_GENERATION | |
LIST_BASED_SCHEDULING | |
MINIMAL_INTERFACE_GENERATION | |
MUX_INTERCONNECTION_BINDING | |
OMP_BODY_LOOP_SYNTHESIS_FLOW | |
PIPELINE_CONTROLLER_CREATOR | |
PORT_SWAPPING | |
SCHED_CHAINING | |
STANDARD_HLS_FLOW | |
TESTBENCH_GENERATION | |
TEST_VECTOR_PARSER | |
TOP_ENTITY_CS_CREATION | |
TOP_ENTITY_CS_PARALLEL_CREATION | |
TOP_ENTITY_CREATION | |
TOP_ENTITY_MEMORY_MAPPED_CREATION | |
UNIQUE_MODULE_BINDING | |
UNIQUE_REGISTER_BINDING | |
VALUES_SCHEME_STORAGE_VALUE_INSERTION | |
VIRTUAL_DESIGN_FLOW | |
WB4_INTERCON_INTERFACE_GENERATION | |
WB4_INTERFACE_GENERATION | |
WEIGHTED_CLIQUE_REGISTER_BINDING | |
WRITE_HLS_SUMMARY | |