43 #include "config_SKIP_WARNING_SECTIONS.hpp" 46 #if SKIP_WARNING_SECTIONS 47 #pragma GCC diagnostic ignored "-Wshadow" 48 #pragma GCC diagnostic ignored "-Wsign-conversion" 49 #pragma GCC diagnostic ignored "-Wconversion" 50 #pragma GCC diagnostic ignored "-Wunused-parameter" 65 #include "FPAdderSinglePath.hpp" 88 extern vector<Operator*>
oplist;
92 FPle_expr::FPle_expr(Target* _target,
int wE,
int wF) : Operator(_target)
96 name <<
"FPle_expr_" << wE <<
"_" << wF;
99 setCopyrightString(
"Fabrizio Ferrandi (2011-2018)");
103 addFPInput(
"X", wE, wF);
104 addFPInput(
"Y", wE, wF);
108 manageCriticalPath(_target->localWireDelay() + _target->lutDelay());
109 vhdl <<
tab << declare(
"nX", wE + wF + 3) <<
" <= X" << range(wE + wF + 2, wE + wF + 1) <<
" & not(X" 110 << of(wE + wF) <<
") & X" << range(wE + wF - 1, 0) <<
";" << endl;
111 auto* value_difference =
new FPAdderSinglePath(_target, wE, wF, wE, wF, wE, wF);
112 value_difference->changeName(getName() +
"value_difference");
113 oplist.push_back(value_difference);
114 inPortMap(value_difference,
"X",
"Y");
115 inPortMap(value_difference,
"Y",
"nX");
116 outPortMap(value_difference,
"R",
"valueDiff");
117 vhdl << instance(value_difference,
"value_difference");
118 syncCycleFromSignal(
"valueDiff");
119 setCriticalPath(value_difference->getOutputDelay(
"R"));
121 manageCriticalPath(_target->localWireDelay() + _target->lutDelay());
122 vhdl <<
tab <<
"R(0) <= '1' when (valueDiff" << of(wE + wF) <<
"='0' or (valueDiff" 123 << range(wE + wF + 2, wE + wF + 1) <<
" = \"00\")) else '0';" << endl;
Forward declarations of FloPoCo classes.
void buildStandardTestCases(TestCaseList *tcl) override
Definition of hash function for EdgeDescriptor.
redefinition of map to manage ordered/unordered structures
~FPle_expr() override
destructor
This file collects some utility functions and macros.
void emulate(TestCase *tc) override
Wrapper to FloPoCo for VHDL code generation.
FPle_expr module for flopoco.
vector< Operator * > oplist