PandA-2024.02
taste_interface_generation.cpp
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41 #include "Parameter.hpp"
42 #include "aadl_information.hpp"
43 #include "add_library.hpp"
44 #include "behavioral_helper.hpp"
45 #include "custom_set.hpp"
46 #include "dbgPrintHelper.hpp" // for DEBUG_LEVEL_
47 #include "design_flow_graph.hpp"
48 #include "design_flow_manager.hpp"
49 #include "fileIO.hpp"
50 #include "hls.hpp"
51 #include "hls_device.hpp"
53 #include "hls_manager.hpp"
54 #include "memory.hpp"
55 #include "memory_cs.hpp"
57 #include "string_manipulation.hpp" // for GET_CLASS
58 #include "structural_manager.hpp"
59 #include "structural_objects.hpp"
60 #include "taste_constants.hpp"
61 #include "technology_manager.hpp"
62 #include "technology_node.hpp"
63 #include "tree_manager.hpp"
64 #include <string>
65 #include <tuple>
66 #include <utility>
67 
69  unsigned int _funId,
70  const DesignFlowManagerConstRef _design_flow_manager)
71  : module_interface(_Param, _HLSMgr, _funId, _design_flow_manager, HLSFlowStep_Type::TASTE_INTERFACE_GENERATION)
72 {
73  debug_level = parameters->get_class_debug_level(GET_CLASS(*this));
74 }
75 
77 
80 {
81  const auto temp_ret = module_interface::ComputeHLSRelationships(relationship_type);
82  auto ret = temp_ret;
83  switch(relationship_type)
84  {
86  {
89  break;
90  }
92  {
93  break;
94  }
96  {
97  break;
98  }
99  default:
100  THROW_UNREACHABLE("");
101  }
102  return ret;
103 }
104 
106 {
107  const technology_managerRef TM = HLS->HLS_D->get_technology_manager();
108  const FunctionBehaviorConstRef FB = HLSMgr->CGetFunctionBehavior(funId);
109  const auto function_name = FB->CGetBehavioralHelper()->get_function_name();
110 
111  const auto aadl_information = HLSMgr->aadl_information;
112 
114  const std::string module_name = FB->CGetBehavioralHelper()->get_function_name() + "_taste_interface";
115 
116  auto SM_minimal_interface = HLS->top;
117 
119 
120  auto SM_taste_interface = HLS->top;
121 
122  structural_type_descriptorRef module_type =
124 
125  SM_taste_interface->set_top_info(module_name, module_type);
126 
127  structural_objectRef taste_interface_circuit = SM_taste_interface->get_circ();
129 
130  taste_interface_circuit->set_black_box(false);
131 
133  GetPointer<module>(taste_interface_circuit)->set_description("Top circuit for " + module_name);
134  GetPointer<module>(taste_interface_circuit)->set_copyright("Copyright (C) 2004-2024 Politecnico di Milano");
135  GetPointer<module>(taste_interface_circuit)->set_authors("module automatically generated by bambu");
136  GetPointer<module>(taste_interface_circuit)->set_license("PANDA_GPLv3");
137 
138  structural_objectRef minimal_interface = SM_minimal_interface->get_circ();
139  auto minimal_interface_module = GetPointer<const module>(minimal_interface);
140  minimal_interface->set_owner(taste_interface_circuit);
141  minimal_interface->set_id("accelerator");
142 
144  GetPointer<module>(taste_interface_circuit)->add_internal_object(minimal_interface);
145 
147  const bool with_memory = [&]() -> bool {
148  INDENT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, "-->Checking if internal memory has to be instantiated");
149  for(unsigned int i = 0; i < minimal_interface_module->get_in_port_size(); i++)
150  {
151  const structural_objectRef& port_obj = minimal_interface_module->get_in_port(i);
152  if(GetPointer<port_o>(port_obj)->get_is_memory())
153  {
154  INDENT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, "---Port " + GetPointer<port_o>(port_obj)->get_id());
155  if(GetPointer<port_o>(port_obj)->get_id().find('M') == 0)
156  {
157  INDENT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, "<--Memory has to be instantiated");
158  return true;
159  }
160  }
161  }
162  INDENT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, "<--Memory has not to be instantiated");
163  return false;
164  }();
165 
169  SM_taste_interface->add_port(CLOCK_PORT_NAME, port_o::IN, taste_interface_circuit, clock_type);
170 
172  SM_taste_interface->add_port(RESET_PORT_NAME, port_o::IN, taste_interface_circuit, reset_type);
173 
175  SM_taste_interface->add_port("apbi_psel", port_o::IN, taste_interface_circuit, bool_type);
176  SM_taste_interface->add_port("apbi_penable", port_o::IN, taste_interface_circuit, bool_type);
177  SM_taste_interface->add_port("apbi_pwrite", port_o::IN, taste_interface_circuit, bool_type);
178 
179  structural_type_descriptorRef word_bool_type =
181  SM_taste_interface->add_port("apbi_pwdata", port_o::IN, taste_interface_circuit, word_bool_type);
182  SM_taste_interface->add_port("apbi_paddr", port_o::IN, taste_interface_circuit, word_bool_type);
183 
184  SM_taste_interface->add_port("apbo_prdata", port_o::OUT, taste_interface_circuit, word_bool_type);
186 
188  AddConnection(SM_taste_interface, taste_interface_circuit, CLOCK_PORT_NAME, minimal_interface, CLOCK_PORT_NAME);
189  AddConnection(SM_taste_interface, taste_interface_circuit, RESET_PORT_NAME, minimal_interface, RESET_PORT_NAME);
190 
192  THROW_ASSERT(parameters->getOption<std::string>(OPT_top_functions_names).find(STR_CST_taste_reg_status) !=
193  std::string::npos,
195 #ifndef NDEBUG
196  {
197  const auto number_of_states =
198  HLSMgr->get_HLS(HLSMgr->get_tree_manager()->function_index(STR_CST_taste_reg_status))
199  ->STG->get_number_of_states();
200  THROW_ASSERT(number_of_states == 1, STR(number_of_states));
201  }
202 #endif
203  INDENT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, "-->Adding reg_status");
204 
206  const auto reg_status_update = SM_taste_interface->add_module_from_technology_library(
207  "reg_status_update", STR_CST_taste_reg_status, WORK_LIBRARY, taste_interface_circuit, TM);
208  const auto done_port_converter = SM_taste_interface->add_module_from_technology_library(
209  "done_port_converter", UUDATA_CONVERTER_STD, TM->get_library(UUDATA_CONVERTER_STD), taste_interface_circuit, TM);
210  AddSignal(SM_taste_interface, minimal_interface, DONE_PORT_NAME, done_port_converter, "in1", "done_port_output");
211  AddSignal(SM_taste_interface, done_port_converter, "out1", reg_status_update, "from_done",
212  "done_port_converter_output");
213  AddConnection(SM_taste_interface, taste_interface_circuit, "apbi_pwdata", reg_status_update, "from_outside");
214  AddConnection(SM_taste_interface, taste_interface_circuit, CLOCK_PORT_NAME, reg_status_update, CLOCK_PORT_NAME);
215  AddConnection(SM_taste_interface, taste_interface_circuit, RESET_PORT_NAME, reg_status_update, RESET_PORT_NAME);
216  AddConstant(SM_taste_interface, reg_status_update, START_PORT_NAME, "1", 1);
217 
219  const auto reg_status = SM_taste_interface->add_module_from_technology_library(
220  "reg_status", register_SE, TM->get_library(register_SE), taste_interface_circuit, TM);
221  const auto shift = SM_taste_interface->add_module_from_technology_library(
222  "shift", "ui_rshift_expr_FU", TM->get_library("ui_rshift_expr_FU"), taste_interface_circuit, TM);
223  shift->SetParameter("PRECISION", "32");
224  GetPointer<port_o>(GetPointer<module>(reg_status)->find_member("in1", port_o_K, reg_status))->type_resize(32);
225  GetPointer<port_o>(GetPointer<module>(reg_status)->find_member("out1", port_o_K, reg_status))->type_resize(32);
226  GetPointer<port_o>(GetPointer<module>(shift)->find_member("in1", port_o_K, shift))->type_resize(32);
227  GetPointer<port_o>(GetPointer<module>(shift)->find_member("out1", port_o_K, shift))->type_resize(32);
228  const auto start_port_converter = SM_taste_interface->add_module_from_technology_library(
229  "start_port_converter", UUDATA_CONVERTER_STD, TM->get_library(UUDATA_CONVERTER_STD), taste_interface_circuit,
230  TM);
231  AddSignal(SM_taste_interface, reg_status, "out1", shift, "in1", "reg_status_output");
232  AddConstant(SM_taste_interface, shift, "in2", "3", 3);
233  AddSignal(SM_taste_interface, reg_status, "out1", reg_status_update, "current_value", "reg_status_output");
234  AddSignal(SM_taste_interface, shift, "out1", start_port_converter, "in1", "shift_output");
235  AddSignal(SM_taste_interface, start_port_converter, "out1", minimal_interface, START_PORT_NAME,
236  "start_port_converter_output");
237  AddConstant(SM_taste_interface, reg_status, "wenable", "1", 1);
238  AddSignal(SM_taste_interface, reg_status_update, "return_port", reg_status, "in1", "reg_status_update_output");
239  AddConnection(SM_taste_interface, taste_interface_circuit, CLOCK_PORT_NAME, reg_status, CLOCK_PORT_NAME);
240  AddConnection(SM_taste_interface, taste_interface_circuit, RESET_PORT_NAME, reg_status, RESET_PORT_NAME);
241  INDENT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, "<--Added reg_status");
242 
244  unsigned long long int addr_range = aadl_information->exposed_memory_sizes[function_name];
245  unsigned int index;
246  for(index = 1; addr_range >= (1ull << index); ++index)
247  {
248  ;
249  }
250  const auto relative_address_bitsize = index;
251  unsigned long long int address_mask = 0;
252  for(index = 0; index < relative_address_bitsize; index++)
253  {
254  address_mask += 1ull << index;
255  }
256 
258  const auto filtered_address = SM_taste_interface->add_module_from_technology_library(
259  "filtered_address", "ui_bit_and_expr_FU", TM->get_library("ui_bit_and_expr_FU"), taste_interface_circuit, TM);
260  GetPointer<port_o>(GetPointer<module>(filtered_address)->find_member("out1", port_o_K, filtered_address))
261  ->type_resize(32);
262  AddConnection(SM_taste_interface, taste_interface_circuit, "apbi_paddr", filtered_address, "in1");
263  AddConstant(SM_taste_interface, filtered_address, "in2", STR(address_mask), 32);
264 
266  THROW_ASSERT(parameters->getOption<std::string>(OPT_top_functions_names)
267  .find(STR_CST_taste_endianess_check + function_name) != std::string::npos,
268  "");
269  THROW_ASSERT(
270  HLSMgr->get_HLS(HLSMgr->get_tree_manager()->function_index(STR_CST_taste_endianess_check + function_name))
271  ->STG->get_number_of_states() == 1,
272  "Number of states of " STR_CST_taste_endianess_check + function_name + " is " +
273  STR(HLSMgr
274  ->get_HLS(HLSMgr->get_tree_manager()->function_index(STR_CST_taste_endianess_check + function_name))
275  ->STG->get_number_of_states()));
276  const auto endianess_check = SM_taste_interface->add_module_from_technology_library(
277  "endianess_check", STR_CST_taste_endianess_check + function_name, WORK_LIBRARY, taste_interface_circuit, TM);
278  AddConnection(SM_taste_interface, taste_interface_circuit, "apbi_pwdata", endianess_check, "arg");
279  AddConnection(SM_taste_interface, taste_interface_circuit, CLOCK_PORT_NAME, endianess_check, CLOCK_PORT_NAME);
280  AddConnection(SM_taste_interface, taste_interface_circuit, RESET_PORT_NAME, endianess_check, RESET_PORT_NAME);
281  AddConnection(SM_taste_interface, taste_interface_circuit, "apbi_psel", endianess_check, START_PORT_NAME);
282 
283 #if 1
284  THROW_ASSERT(parameters->getOption<std::string>(OPT_top_functions_names).find(STR_CST_taste_endianess_inversion) !=
286  std::string::npos,
287  "");
288  THROW_ASSERT(HLSMgr->get_HLS(HLSMgr->get_tree_manager()->function_index(STR_CST_taste_endianess_inversion))
289  ->STG->get_number_of_states() == 1,
290  "");
291  const auto swap32_in = SM_taste_interface->add_module_from_technology_library(
292  "swap32_in", STR_CST_taste_endianess_inversion, WORK_LIBRARY, taste_interface_circuit, TM);
293  const auto swap32_in_cond_expr = SM_taste_interface->add_module_from_technology_library(
294  "swap32_in_cond_expr", "ui_cond_expr_FU", TM->get_library("ui_cond_expr_FU"), taste_interface_circuit, TM);
295  AddConnection(SM_taste_interface, taste_interface_circuit, "apbi_pwdata", swap32_in, "x");
296  AddConnection(SM_taste_interface, taste_interface_circuit, CLOCK_PORT_NAME, swap32_in, CLOCK_PORT_NAME);
297  AddConnection(SM_taste_interface, taste_interface_circuit, RESET_PORT_NAME, swap32_in, RESET_PORT_NAME);
298  AddConnection(SM_taste_interface, taste_interface_circuit, "apbi_psel", swap32_in, START_PORT_NAME);
299 
300  AddSignal(SM_taste_interface, endianess_check, "return_port", swap32_in_cond_expr, "in1", "endianess_check_output");
301  AddSignal(SM_taste_interface, swap32_in, "return_port", swap32_in_cond_expr, "in2", "swap32_in_output");
302  AddConnection(SM_taste_interface, taste_interface_circuit, "apbi_pwdata", swap32_in_cond_expr, "in3");
303 #endif
304 
305  INDENT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, "-->Creating parameter registers");
307  THROW_ASSERT(aadl_information->function_parameters.find("PI_" + function_name) !=
308  aadl_information->function_parameters.end(),
309  "Parameters information of PI_" + function_name + " not found");
310  for(const auto& function_parameter : aadl_information->function_parameters.find("PI_" + function_name)->second)
311  {
312  if(function_parameter.num_registers)
313  {
314  INDENT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, "-->Creating registers for " + function_parameter.name);
315  THROW_ASSERT(function_parameter.num_registers == 1, "Multiple registers not supported");
316  const auto param_reg = SM_taste_interface->add_module_from_technology_library(
317  function_parameter.name + "_reg", register_SE, TM->get_library(register_SE), taste_interface_circuit, TM);
318  AddConnection(SM_taste_interface, taste_interface_circuit, CLOCK_PORT_NAME, param_reg, CLOCK_PORT_NAME);
319  switch(function_parameter.direction)
320  {
321  case AadlInformation::AadlParameter::Direction::IN:
322  {
324  const auto address_compare = SM_taste_interface->add_module_from_technology_library(
325  "address_compare_" + function_parameter.name, "ui_eq_expr_FU", TM->get_library("ui_eq_expr_FU"),
326  taste_interface_circuit, TM);
327  const auto port = minimal_interface->find_member(function_parameter.name, port_o_K, minimal_interface);
328  THROW_ASSERT(port, "");
329  const auto port_size = GET_TYPE_SIZE(port);
330  GetPointer<port_o>(GetPointer<module>(param_reg)->find_member("in1", port_o_K, param_reg))
331  ->type_resize(port_size);
332  GetPointer<port_o>(GetPointer<module>(param_reg)->find_member("out1", port_o_K, param_reg))
333  ->type_resize(port_size);
334 
336  const auto param_converter = SM_taste_interface->add_module_from_technology_library(
337  "param_converter_" + function_parameter.name, UUDATA_CONVERTER_STD,
338  TM->get_library(UUDATA_CONVERTER_STD), taste_interface_circuit, TM);
339  GetPointer<port_o>(GetPointer<module>(param_converter)->find_member("in1", port_o_K, param_converter))
340  ->type_resize(32);
341  AddSignal(SM_taste_interface, swap32_in_cond_expr, "out1", param_converter, "in1",
342  "endianess_inversion_output");
343 
345  AddSignal(SM_taste_interface, filtered_address, "out1", address_compare, "in1",
346  "filtered_address_output");
347  AddConstant(SM_taste_interface, address_compare, "in2", std::to_string(function_parameter.bambu_address),
348  32);
349  AddSignal(SM_taste_interface, address_compare, "out1", param_reg, "wenable", "address_compare_output");
350  AddSignal(SM_taste_interface, param_converter, "out1", param_reg, "in1",
351  "param_converter_" + function_parameter.name + "_output");
352  AddSignal(SM_taste_interface, param_reg, "out1", minimal_interface, function_parameter.name,
353  function_parameter.name + "_reg_output");
354  break;
355  }
356  case AadlInformation::AadlParameter::Direction::OUT:
357  {
359  const auto port = minimal_interface->find_member(RETURN_PORT_NAME, port_o_K, minimal_interface);
360  THROW_ASSERT(port, "");
361  const auto port_size = GET_TYPE_SIZE(port);
362  GetPointer<port_o>(GetPointer<module>(param_reg)->find_member("in1", port_o_K, param_reg))
363  ->type_resize(port_size);
364  GetPointer<port_o>(GetPointer<module>(param_reg)->find_member("out1", port_o_K, param_reg))
365  ->type_resize(port_size);
366 
368  AddSignal(SM_taste_interface, minimal_interface, RETURN_PORT_NAME, param_reg, "in1",
369  "return_port_output");
370 
372  AddSignal(SM_taste_interface, minimal_interface, DONE_PORT_NAME, param_reg, "wenable",
373  "done_port_output");
374 
376  const auto param_converter = SM_taste_interface->add_module_from_technology_library(
377  "param_converter_return_port", UUDATA_CONVERTER_STD, TM->get_library(UUDATA_CONVERTER_STD),
378  taste_interface_circuit, TM);
379  AddSignal(SM_taste_interface, param_reg, "out1", param_converter, "in1", "return_port_reg_output");
380  break;
381  }
382  case AadlInformation::AadlParameter::Direction::INOUT:
383  {
384  THROW_UNREACHABLE("");
385  break;
386  }
387  default:
388  THROW_UNREACHABLE("");
389  }
390  INDENT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, "<--Created registers for " + function_parameter.name);
391  }
392  else if(function_parameter.pointer)
393  {
394  AddConstant(SM_taste_interface, minimal_interface, function_parameter.name,
395  STR(function_parameter.bambu_address), 32);
396  }
397  else
398  {
399  THROW_UNREACHABLE("Not allocated parameter");
400  }
401  }
402  INDENT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, "<--Created parameter registers");
403 
406  if(with_memory)
407  {
408  memory = SM_taste_interface->add_module_from_technology_library("local_memory", ARRAY_1D_STD_BRAM_NN,
409  LIBRARY_STD_FU, taste_interface_circuit, TM);
410  memory->SetParameter("address_space_rangesize", STR(aadl_information->internal_memory_sizes[function_name]));
411  memory->SetParameter("BRAM_BITSIZE", STR(HLSMgr->Rmem->get_bram_bitsize()));
412 
414  auto bus_data_bitsize = HLSMgr->Rmem->get_bus_data_bitsize();
415  auto bus_addr_bitsize = HLSMgr->get_address_bitsize();
416  auto bus_size_bitsize = HLSMgr->Rmem->get_bus_size_bitsize();
417  auto bus_data_bytesize = HLSMgr->Rmem->get_bus_data_bitsize() / 8;
418 
419  auto bus_tag_bitsize = 0ull;
420  if(HLS->Param->getOption<bool>(OPT_parse_pragma) && HLS->Param->isOption(OPT_context_switch))
421  {
422  bus_tag_bitsize = GetPointer<memory_cs>(HLSMgr->Rmem)->get_bus_tag_bitsize();
423  }
424 
425  const unsigned long long int n_elements =
426  aadl_information->internal_memory_sizes[function_name] / bus_data_bytesize +
427  ((aadl_information->internal_memory_sizes[function_name] % bus_data_bytesize) ? 1 : 0);
428 
429  memory->SetParameter("n_elements", STR(n_elements));
430 
431  std::string init_filename_a = GetPath(function_name + "_a.data");
432  std::string init_filename_b = GetPath(function_name + "_b.data");
433  std::ofstream init_file_a(init_filename_a);
434  std::ofstream init_file_b(init_filename_b);
435 
436  memory->SetParameter("MEMORY_INIT_file_a", "\"\"" + init_filename_a + "\"\"");
437  memory->SetParameter("MEMORY_INIT_file_b", "\"\"" + init_filename_b + "\"\"");
438 
439  for(unsigned int row_index = 0; row_index < n_elements; row_index++)
440  {
441  init_file_a << std::string(bus_data_bitsize / 2, '0') << std::endl;
442  init_file_b << std::string(bus_data_bitsize / 2, '0') << std::endl;
443  }
444  init_file_a.close();
445  init_file_b.close();
446 
447  for(unsigned int i = 0; i < GetPointer<module>(memory)->get_in_port_size(); i++)
448  {
449  structural_objectRef port = GetPointer<module>(memory)->get_in_port(i);
450  if(port->get_kind() == port_vector_o_K && GetPointer<port_o>(port)->get_ports_size() == 0)
451  {
452  GetPointer<port_o>(port)->add_n_ports(2, port);
453  }
454  port_o::resize_if_busport(bus_size_bitsize, bus_addr_bitsize, bus_data_bitsize, bus_tag_bitsize, port);
455  }
456 
457  const auto in1_port = memory->find_member("in1", port_vector_o_K, memory);
458  in1_port->type_resize(HLSMgr->Rmem->get_bus_data_bitsize());
459  const auto in2_port = memory->find_member("in2", port_vector_o_K, memory);
460  in2_port->type_resize(HLSMgr->get_address_bitsize());
461  const auto in3_port = memory->find_member("in3", port_vector_o_K, memory);
462  in3_port->type_resize(HLSMgr->Rmem->get_bus_size_bitsize());
463  /*
464  const auto in4_port = memory->find_member("in4", port_vector_o_K, memory);
465  GetPointer<port_o>(in4_port)->add_n_ports(2, in4_port);*/
466  AddConstant(SM_taste_interface, memory, "in4[0]", "1", 1);
467  AddConstant(SM_taste_interface, memory, "in4[1]", "1", 1);
468 
469  for(unsigned int i = 0; i < GetPointer<module>(memory)->get_out_port_size(); i++)
470  {
471  structural_objectRef port = GetPointer<module>(memory)->get_out_port(i);
472  if(port->get_kind() == port_vector_o_K && GetPointer<port_o>(port)->get_ports_size() == 0)
473  {
474  GetPointer<port_o>(port)->add_n_ports(2, port);
475  }
476  port_o::resize_if_busport(bus_size_bitsize, bus_addr_bitsize, bus_data_bitsize, bus_tag_bitsize, port);
477  }
478 
480  mem_signals.insert(std::pair<std::string, std::string>("M_DataRdy", "Sout_DataRdy"));
481  mem_signals.insert(std::pair<std::string, std::string>("M_Rdata_ram", "Sin_Rdata_ram"));
482  mem_signals.insert(std::pair<std::string, std::string>("Mout_addr_ram", "S_addr_ram"));
483  mem_signals.insert(std::pair<std::string, std::string>("Mout_data_ram_size", "S_data_ram_size"));
484  mem_signals.insert(std::pair<std::string, std::string>("Mout_oe_ram", "S_oe_ram"));
485  mem_signals.insert(std::pair<std::string, std::string>("Mout_we_ram", "S_we_ram"));
486  mem_signals.insert(std::pair<std::string, std::string>("Mout_Wdata_ram", "S_Wdata_ram"));
487 
488  for(const auto& mem_signal : mem_signals)
489  {
490  const auto port1 = minimal_interface->find_member(mem_signal.first, port_vector_o_K, minimal_interface);
491  THROW_ASSERT(port1, mem_signal.first + " not found in " + minimal_interface->get_path());
492  const auto port2 = memory->find_member(mem_signal.second, port_vector_o_K, memory);
493  THROW_ASSERT(port2, mem_signal.second + " not found in " + memory->get_path());
495  "---Connecting " + port1->get_path() + " to " + port2->get_path());
496  add_sign_vector(SM_taste_interface, port1, port2, mem_signal.first);
497  }
498  AddConstant(SM_taste_interface, memory, "Sin_DataRdy[0]", STR(0), 1);
499  AddConstant(SM_taste_interface, memory, "Sin_DataRdy[1]", STR(0), 1);
500  AddConstant(SM_taste_interface, memory, "proxy_sel_LOAD[0]", STR(0), 1);
501  AddConstant(SM_taste_interface, memory, "proxy_sel_LOAD[1]", STR(0), 1);
502  AddConstant(SM_taste_interface, memory, "proxy_sel_STORE[0]", STR(0), 1);
503  AddConstant(SM_taste_interface, memory, "proxy_sel_STORE[1]", STR(0), 1);
504  const auto proxy_in1_port = memory->find_member("proxy_in1", port_vector_o_K, memory);
505  proxy_in1_port->type_resize(HLSMgr->Rmem->get_bus_data_bitsize());
506  const auto proxy_in2_port = memory->find_member("proxy_in2", port_vector_o_K, memory);
507  proxy_in2_port->type_resize(HLSMgr->get_address_bitsize());
508  const auto proxy_in3_port = memory->find_member("proxy_in3", port_vector_o_K, memory);
509  proxy_in3_port->type_resize(HLSMgr->Rmem->get_bus_size_bitsize());
510  AddConstant(SM_taste_interface, memory, "proxy_in1[0]", STR(0), HLSMgr->Rmem->get_bus_data_bitsize());
511  AddConstant(SM_taste_interface, memory, "proxy_in1[1]", STR(0), HLSMgr->Rmem->get_bus_data_bitsize());
512  AddConstant(SM_taste_interface, memory, "proxy_in2[0]", STR(0), HLSMgr->get_address_bitsize());
513  AddConstant(SM_taste_interface, memory, "proxy_in2[1]", STR(0), HLSMgr->get_address_bitsize());
514  AddConstant(SM_taste_interface, memory, "proxy_in3[0]", STR(0), HLSMgr->Rmem->get_bus_size_bitsize());
515  AddConstant(SM_taste_interface, memory, "proxy_in3[1]", STR(0), HLSMgr->Rmem->get_bus_size_bitsize());
516 
518  THROW_ASSERT(parameters->getOption<std::string>(OPT_top_functions_names)
519  .find(STR_CST_taste_address_translation + function_name) != std::string::npos,
520  "");
521  THROW_ASSERT(
522  HLSMgr->get_HLS(HLSMgr->get_tree_manager()->function_index(STR_CST_taste_address_translation + function_name))
523  ->STG->get_number_of_states() == 1,
524  "");
525  const auto memory_translation = SM_taste_interface->add_module_from_technology_library(
526  "memory_translation", STR_CST_taste_address_translation + function_name, WORK_LIBRARY,
527  taste_interface_circuit, TM);
528  AddSignal(SM_taste_interface, filtered_address, "out1", memory_translation, "arg", "memory_translation_arg");
529  AddConnection(SM_taste_interface, taste_interface_circuit, CLOCK_PORT_NAME, memory_translation, CLOCK_PORT_NAME);
530  AddConnection(SM_taste_interface, taste_interface_circuit, RESET_PORT_NAME, memory_translation, RESET_PORT_NAME);
531  AddConnection(SM_taste_interface, taste_interface_circuit, "apbi_psel", memory_translation, START_PORT_NAME);
532 
534  THROW_ASSERT(
535  parameters->getOption<std::string>(OPT_top_functions_names).find(STR_CST_taste_data_size + function_name) !=
536  std::string::npos,
537  "");
538  THROW_ASSERT(HLSMgr->get_HLS(HLSMgr->get_tree_manager()->function_index(STR_CST_taste_data_size + function_name))
539  ->STG->get_number_of_states() == 1,
540  "");
541  const auto data_size = SM_taste_interface->add_module_from_technology_library(
542  "data_size", STR_CST_taste_data_size + function_name, WORK_LIBRARY, taste_interface_circuit, TM);
543  AddSignal(SM_taste_interface, filtered_address, "out1", data_size, "arg", "data_size_arg");
544  AddConnection(SM_taste_interface, taste_interface_circuit, CLOCK_PORT_NAME, data_size, CLOCK_PORT_NAME);
545  AddConnection(SM_taste_interface, taste_interface_circuit, RESET_PORT_NAME, data_size, RESET_PORT_NAME);
546  AddConnection(SM_taste_interface, taste_interface_circuit, "apbi_psel", data_size, START_PORT_NAME);
547 
549  THROW_ASSERT(parameters->getOption<std::string>(OPT_top_functions_names)
550  .find(STR_CST_taste_memory_enabling + function_name) != std::string::npos,
551  "");
552  THROW_ASSERT(
553  HLSMgr->get_HLS(HLSMgr->get_tree_manager()->function_index(STR_CST_taste_memory_enabling + function_name))
554  ->STG->get_number_of_states() == 1,
555  "");
556  const auto memory_enabling = SM_taste_interface->add_module_from_technology_library(
557  "memory_enabling", STR_CST_taste_memory_enabling + function_name, WORK_LIBRARY, taste_interface_circuit, TM);
558  AddSignal(SM_taste_interface, filtered_address, "out1", memory_enabling, "arg", "memory_enabling_arg");
559  AddConnection(SM_taste_interface, taste_interface_circuit, CLOCK_PORT_NAME, memory_enabling, CLOCK_PORT_NAME);
560  AddConnection(SM_taste_interface, taste_interface_circuit, RESET_PORT_NAME, memory_enabling, RESET_PORT_NAME);
561  AddConnection(SM_taste_interface, taste_interface_circuit, "apbi_psel", memory_enabling, START_PORT_NAME);
562 
564  const auto memory_enabling_converter = SM_taste_interface->add_module_from_technology_library(
565  "memory_enabling_converter", UUDATA_CONVERTER_STD, TM->get_library(UUDATA_CONVERTER_STD),
566  taste_interface_circuit, TM);
567  const auto actual_memory_enabling = SM_taste_interface->add_module_from_technology_library(
568  "actual_memory_enabling", "ui_bit_and_expr_FU", TM->get_library("ui_bit_and_expr_FU"),
569  taste_interface_circuit, TM);
570  AddSignal(SM_taste_interface, memory_enabling, "return_port", memory_enabling_converter, "in1",
571  "memory_enabling_output");
572  AddSignal(SM_taste_interface, memory_enabling_converter, "out1", actual_memory_enabling, "in1",
573  "memory_enabling_converter_output");
574  AddConnection(SM_taste_interface, taste_interface_circuit, "apbi_psel", actual_memory_enabling, "in2");
575 
577  const auto not_write = SM_taste_interface->add_module_from_technology_library(
578  "load", "ui_bit_not_expr_FU", TM->get_library("ui_bit_not_expr_FU"), taste_interface_circuit, TM);
579  AddConnection(SM_taste_interface, taste_interface_circuit, "apbi_pwrite", not_write, "in1");
580 
582  const auto sel_LOAD = SM_taste_interface->add_module_from_technology_library(
583  "sel_LOAD", "ui_bit_and_expr_FU", TM->get_library("ui_bit_and_expr_FU"), taste_interface_circuit, TM);
584  AddSignal(SM_taste_interface, actual_memory_enabling, "out1", sel_LOAD, "in1", "actual_memory_enabling_output");
585  AddSignal(SM_taste_interface, not_write, "out1", sel_LOAD, "in2", "not_write_output");
586 
588  const auto sel_STORE = SM_taste_interface->add_module_from_technology_library(
589  "sel_STORE", "ui_bit_and_expr_FU", TM->get_library("ui_bit_and_expr_FU"), taste_interface_circuit, TM);
590  AddSignal(SM_taste_interface, actual_memory_enabling, "out1", sel_STORE, "in1", "actual_memory_enabling_output");
591  AddConnection(SM_taste_interface, taste_interface_circuit, "apbi_pwrite", sel_STORE, "in2");
592 
594  AddSignal(SM_taste_interface, swap32_in_cond_expr, "out1", memory, "in1[0]", "endianess_inversion_output");
595  AddConstant(SM_taste_interface, memory, "in1[1]", "0", HLSMgr->Rmem->get_bus_data_bitsize());
597  const auto in2_converter = SM_taste_interface->add_module_from_technology_library(
598  "in2_converter", UUDATA_CONVERTER_STD, TM->get_library(UUDATA_CONVERTER_STD), taste_interface_circuit, TM);
599  AddSignal(SM_taste_interface, memory_translation, RETURN_PORT_NAME, in2_converter, "in1", "in2_converter_output");
600  AddSignal(SM_taste_interface, in2_converter, "out1", memory, "in2[0]", "in2_0");
601  AddConstant(SM_taste_interface, memory, "in2[1]", "0", HLSMgr->get_address_bitsize());
603  const auto in3_converter = SM_taste_interface->add_module_from_technology_library(
604  "in3_converter", UUDATA_CONVERTER_STD, TM->get_library(UUDATA_CONVERTER_STD), taste_interface_circuit, TM);
605  AddSignal(SM_taste_interface, data_size, RETURN_PORT_NAME, in3_converter, "in1", "in3_converter_outpuT");
606  AddSignal(SM_taste_interface, in3_converter, "out1", memory, "in3[0]", "in3_0");
607  AddConstant(SM_taste_interface, memory, "in3[1]", "0", HLSMgr->Rmem->get_bus_size_bitsize());
609  AddSignal(SM_taste_interface, sel_LOAD, "out1", memory, "sel_LOAD[0]", "sel_LOAD_output");
610  AddConstant(SM_taste_interface, memory, "sel_LOAD[1]", "0", 1);
612  AddSignal(SM_taste_interface, sel_STORE, "out1", memory, "sel_STORE[0]", "sel_STORE_output");
613  AddConstant(SM_taste_interface, memory, "sel_STORE[1]", "0", 1);
615  AddConnection(SM_taste_interface, taste_interface_circuit, CLOCK_PORT_NAME, memory, CLOCK_PORT_NAME);
616  AddConnection(SM_taste_interface, taste_interface_circuit, RESET_PORT_NAME, memory, RESET_PORT_NAME);
617  }
619  THROW_ASSERT(parameters->getOption<std::string>(OPT_top_functions_names)
620  .find(STR_CST_taste_output_multiplexer + function_name) != std::string::npos,
621  "");
622  THROW_ASSERT(
623  HLSMgr->get_HLS(HLSMgr->get_tree_manager()->function_index(STR_CST_taste_output_multiplexer + function_name))
624  ->STG->get_number_of_states() == 1,
625  "");
626  const auto output_multiplexer = SM_taste_interface->add_module_from_technology_library(
627  "output_multiplexer", STR_CST_taste_output_multiplexer + function_name, WORK_LIBRARY, taste_interface_circuit,
628  TM);
629  AddSignal(SM_taste_interface, filtered_address, "out1", output_multiplexer, "address", "memory_enabling_arg");
630  AddSignal(SM_taste_interface, reg_status, "out1", output_multiplexer, "reg_status", "reg_status_output");
631  const auto return_port = minimal_interface->find_member(RETURN_PORT_NAME, port_o_K, minimal_interface);
632  if(return_port)
633  {
634  AddSignal(SM_taste_interface, minimal_interface, RETURN_PORT_NAME, output_multiplexer, "function_return_port",
635  "return_port_output");
636  }
637  if(with_memory)
638  {
639  AddSignal(SM_taste_interface, memory, "out1[0]", output_multiplexer, "from_memory", "from_memory_output");
640  const auto fake_register = SM_taste_interface->add_module_from_technology_library(
641  "fake_register", register_SE, TM->get_library(register_SE), taste_interface_circuit, TM);
642  GetPointer<port_o>(GetPointer<module>(fake_register)->find_member("in1", port_o_K, fake_register))
643  ->type_resize(32);
644  GetPointer<port_o>(GetPointer<module>(fake_register)->find_member("out1", port_o_K, fake_register))
645  ->type_resize(32);
646  AddSignal(SM_taste_interface, memory, "out1[1]", fake_register, "in1", "fake_signal");
647  }
648 
649 #if 1
650  THROW_ASSERT(parameters->getOption<std::string>(OPT_top_functions_names).find(STR_CST_taste_endianess_inversion) !=
652  std::string::npos,
653  "");
654  THROW_ASSERT(HLSMgr->get_HLS(HLSMgr->get_tree_manager()->function_index(STR_CST_taste_endianess_inversion))
655  ->STG->get_number_of_states() == 1,
656  "");
657  const auto swap32_out = SM_taste_interface->add_module_from_technology_library(
658  "swap32_out", STR_CST_taste_endianess_inversion, WORK_LIBRARY, taste_interface_circuit, TM);
659  const auto swap32_out_cond_expr = SM_taste_interface->add_module_from_technology_library(
660  "swap32_iout_cond_expr", "ui_cond_expr_FU", TM->get_library("ui_cond_expr_FU"), taste_interface_circuit, TM);
661  AddSignal(SM_taste_interface, output_multiplexer, RETURN_PORT_NAME, swap32_out, "x", "output_multiplexer_output");
662  AddConnection(SM_taste_interface, taste_interface_circuit, CLOCK_PORT_NAME, output_multiplexer, CLOCK_PORT_NAME);
663  AddConnection(SM_taste_interface, taste_interface_circuit, RESET_PORT_NAME, output_multiplexer, RESET_PORT_NAME);
664 
665  AddConnection(SM_taste_interface, taste_interface_circuit, CLOCK_PORT_NAME, swap32_out, CLOCK_PORT_NAME);
666  AddConnection(SM_taste_interface, taste_interface_circuit, RESET_PORT_NAME, swap32_out, RESET_PORT_NAME);
667  AddConnection(SM_taste_interface, taste_interface_circuit, "apbi_psel", swap32_out, START_PORT_NAME);
668  AddSignal(SM_taste_interface, endianess_check, "return_port", swap32_out_cond_expr, "in1", "endianess_check_output");
669  AddSignal(SM_taste_interface, swap32_out, "return_port", swap32_out_cond_expr, "in2", "swap32_out_output");
670  AddSignal(SM_taste_interface, output_multiplexer, RETURN_PORT_NAME, swap32_out_cond_expr, "in3",
671  "output_multiplexer_output");
672  AddSignal(SM_taste_interface, swap32_out_cond_expr, "out1", taste_interface_circuit, "apbo_prdata",
673  "swap32_out_cond_expr_output");
674 #endif
675 
676  taste_interface_circuit->AddParameter("paddr", "0");
677  taste_interface_circuit->AddParameter("pindex", "0");
678  SM_taste_interface->add_NP_functionality(SM_taste_interface->get_circ(), NP_functionality::LIBRARY,
679  function_name + "_taste_interface paddr pindex");
680 
681  SM_taste_interface->INIT(true);
682 
683  if(parameters->getOption<bool>(OPT_print_dot))
684  {
685  SM_taste_interface->WriteDot(FB->CGetBehavioralHelper()->get_function_name() + "/HLS_TasteInterface.dot",
687  }
689 }
690 
692  const DesignFlowStep::RelationshipType relationship_type)
693 {
694  module_interface::ComputeRelationships(relationship, relationship_type);
695  const auto function_name = HLSMgr->CGetFunctionBehavior(funId)->CGetBehavioralHelper()->get_function_name();
696  if(function_name.find(STR_CST_taste_data_size) != std::string::npos)
697  {
698  return;
699  }
700  if(function_name.find(STR_CST_taste_memory_enabling) != std::string::npos)
701  {
702  return;
703  }
704  if(function_name.find(STR_CST_taste_address_translation) != std::string::npos)
705  {
706  return;
707  }
708  if(function_name.find(STR_CST_taste_endianess_check) != std::string::npos)
709  {
710  return;
711  }
712  if(function_name.find(STR_CST_taste_endianess_inversion) != std::string::npos)
713  {
714  return;
715  }
716  if(function_name.find(STR_CST_taste_reg_status) != std::string::npos)
717  {
718  return;
719  }
720  if(function_name.find(STR_CST_taste_output_multiplexer) != std::string::npos)
721  {
722  return;
723  }
724  if(relationship_type == DesignFlowStep::DEPENDENCE_RELATIONSHIP)
725  {
726  const auto hls_flow_step_factory = GetPointer<const HLSFlowStepFactory>(CGetDesignFlowStepFactory());
727  const auto TM = HLSMgr->get_tree_manager();
728 
729  const auto reg_status_function = TM->GetFunction(STR_CST_taste_reg_status);
730  THROW_ASSERT(reg_status_function, STR_CST_taste_reg_status);
731  const auto reg_status_signature = ComputeSignature(
733  reg_status_function->index);
734  const auto reg_status_vertex = design_flow_manager.lock()->GetDesignFlowStep(reg_status_signature);
735  const auto reg_status_step = reg_status_vertex != NULL_VERTEX ?
737  ->CGetDesignFlowGraph()
738  ->CGetDesignFlowStepInfo(reg_status_vertex)
739  ->design_flow_step :
740  hls_flow_step_factory->CreateHLSFlowStep(
741  HLSFlowStep_Type::ADD_LIBRARY, reg_status_function->index,
743  relationship.insert(reg_status_step);
744 
745  const auto endianess_inversion_function = TM->GetFunction(STR_CST_taste_endianess_inversion);
746  THROW_ASSERT(endianess_inversion_function, "");
747  const auto endianess_inversion_signature = ComputeSignature(
749  endianess_inversion_function->index);
750  const auto endianess_inversion_vertex =
751  design_flow_manager.lock()->GetDesignFlowStep(endianess_inversion_signature);
752  const auto endianess_inversion_step =
753  endianess_inversion_vertex != NULL_VERTEX ?
755  ->CGetDesignFlowGraph()
756  ->CGetDesignFlowStepInfo(endianess_inversion_vertex)
757  ->design_flow_step :
758  hls_flow_step_factory->CreateHLSFlowStep(
759  HLSFlowStep_Type::ADD_LIBRARY, endianess_inversion_function->index,
761  relationship.insert(endianess_inversion_step);
762 
763  const auto endianess_check_function = TM->GetFunction(STR_CST_taste_endianess_check + function_name);
764  THROW_ASSERT(endianess_check_function, "");
765  const auto endianess_check_signature = ComputeSignature(
767  endianess_check_function->index);
768  const auto endianess_check_vertex = design_flow_manager.lock()->GetDesignFlowStep(endianess_check_signature);
769  const auto endianess_check_step = endianess_check_vertex != NULL_VERTEX ?
771  ->CGetDesignFlowGraph()
772  ->CGetDesignFlowStepInfo(endianess_check_vertex)
773  ->design_flow_step :
774  hls_flow_step_factory->CreateHLSFlowStep(
775  HLSFlowStep_Type::ADD_LIBRARY, endianess_check_function->index,
777  relationship.insert(endianess_check_step);
778 
779  const auto output_multiplexer_function = TM->GetFunction(STR_CST_taste_output_multiplexer + function_name);
780  THROW_ASSERT(output_multiplexer_function, "");
781  const auto output_multiplexer_signature = ComputeSignature(
783  output_multiplexer_function->index);
784  const auto output_multiplexer_vertex =
785  design_flow_manager.lock()->GetDesignFlowStep(output_multiplexer_signature);
786  const auto output_multiplexer_step =
787  output_multiplexer_vertex != NULL_VERTEX ?
789  ->CGetDesignFlowGraph()
790  ->CGetDesignFlowStepInfo(output_multiplexer_vertex)
791  ->design_flow_step :
792  hls_flow_step_factory->CreateHLSFlowStep(
793  HLSFlowStep_Type::ADD_LIBRARY, output_multiplexer_function->index,
795  relationship.insert(output_multiplexer_step);
796 
797  const auto memory_enabling_function = TM->GetFunction(STR_CST_taste_memory_enabling + function_name);
798  if(memory_enabling_function)
799  {
800  const auto memory_enabling_signature = ComputeSignature(
802  memory_enabling_function->index);
803  const auto memory_enabling_vertex = design_flow_manager.lock()->GetDesignFlowStep(memory_enabling_signature);
804  const auto memory_enabling_step =
805  memory_enabling_vertex != NULL_VERTEX ?
807  ->CGetDesignFlowGraph()
808  ->CGetDesignFlowStepInfo(memory_enabling_vertex)
809  ->design_flow_step :
810  hls_flow_step_factory->CreateHLSFlowStep(
811  HLSFlowStep_Type::ADD_LIBRARY, memory_enabling_function->index,
813  relationship.insert(memory_enabling_step);
814 
815  const auto data_size_function = TM->GetFunction(STR_CST_taste_data_size + function_name);
816  THROW_ASSERT(data_size_function, STR_CST_taste_data_size + function_name);
817  const auto data_size_signature = ComputeSignature(
819  data_size_function->index);
820  const auto data_size_vertex = design_flow_manager.lock()->GetDesignFlowStep(data_size_signature);
821  const auto data_size_step = data_size_vertex != NULL_VERTEX ?
823  ->CGetDesignFlowGraph()
824  ->CGetDesignFlowStepInfo(data_size_vertex)
825  ->design_flow_step :
826  hls_flow_step_factory->CreateHLSFlowStep(
827  HLSFlowStep_Type::ADD_LIBRARY, data_size_function->index,
829  relationship.insert(data_size_step);
830 
831  const auto address_translation_function = TM->GetFunction(STR_CST_taste_address_translation + function_name);
832  THROW_ASSERT(address_translation_function, "");
833  const auto address_translation_signature = ComputeSignature(
835  address_translation_function->index);
836  const auto address_translation_vertex =
837  design_flow_manager.lock()->GetDesignFlowStep(address_translation_signature);
838  const auto address_translation_step =
839  address_translation_vertex != NULL_VERTEX ?
841  ->CGetDesignFlowGraph()
842  ->CGetDesignFlowStepInfo(address_translation_vertex)
843  ->design_flow_step :
844  hls_flow_step_factory->CreateHLSFlowStep(
845  HLSFlowStep_Type::ADD_LIBRARY, address_translation_function->index,
847  relationship.insert(address_translation_step);
848  }
849  }
850 }
851 
853 {
854  const auto function_name = HLSMgr->CGetFunctionBehavior(funId)->CGetBehavioralHelper()->get_function_name();
855  if(function_name.find(STR_CST_taste_data_size) != std::string::npos)
856  {
857  return false;
858  }
859  if(function_name.find(STR_CST_taste_memory_enabling) != std::string::npos)
860  {
861  return false;
862  }
863  if(function_name.find(STR_CST_taste_address_translation) != std::string::npos)
864  {
865  return false;
866  }
867  if(function_name.find(STR_CST_taste_endianess_check) != std::string::npos)
868  {
869  return false;
870  }
871  if(function_name.find(STR_CST_taste_endianess_inversion) != std::string::npos)
872  {
873  return false;
874  }
875  if(function_name.find(STR_CST_taste_reg_status) != std::string::npos)
876  {
877  return false;
878  }
879  if(function_name.find(STR_CST_taste_output_multiplexer) != std::string::npos)
880  {
881  return false;
882  }
884 }
void ComputeRelationships(DesignFlowStepSet &relationship, const DesignFlowStep::RelationshipType relationship_type) override
Compute the relationships of a step with other steps.
The information collected from aadl file.
bool HasToBeExecuted() const override
Check if this step has actually to be executed.
#define DEBUG_LEVEL_VERY_PEDANTIC
extremely verbose debugging print is performed.
const HLS_managerRef HLSMgr
information about all the HLS synthesis
Definition: hls_step.hpp:205
Data structure representing the entire HLS information.
#define INDENT_DBG_MEX(dbgLevel, curDbgLevel, mex)
We are producing a debug version of the program, so the message is printed;.
refcount< structural_type_descriptor > structural_type_descriptorRef
RefCount type definition of the structural_type_descriptor class structure.
File containing functions and utilities to support the printing of debug messagges.
This step adds the current module to the technology library.
#define START_PORT_NAME
This file contains the structures needed to manage a graph that will represent the state transition g...
Structure representing the most relevant information about the type of a structural object...
const ParameterConstRef Param
class containing all the parameters
Definition: hls.hpp:169
#define GET_CLASS(obj)
Macro returning the actual type of an object.
#define STR_CST_taste_memory_enabling
The suffix of the memory enabling function.
std::string get_function_name() const
Return the name of the function.
Class to generate interface for taste architecture.
#define UUDATA_CONVERTER_STD
TasteInterfaceGeneration(const ParameterConstRef Param, const HLS_managerRef HLSMgr, unsigned int funId, const DesignFlowManagerConstRef design_flow_manager)
Constructor.
void set_owner(const structural_objectRef new_owner)
set the owner of the structural object
RelationshipType
The relationship type.
Source must be executed to satisfy target.
const unsigned int funId
identifier of the function to be processed (0 means that it is a global step)
#define STR_CST_taste_output_multiplexer
The suffix of the output multiplexer function.
This class manages the circuit structures.
const HLS_deviceRef HLS_D
reference to the information representing the target for the synthesis
Definition: hls.hpp:107
virtual structural_objectRef find_member(const std::string &id, so_kind type, const structural_objectRef owner) const =0
Return the object named id of a given type which belongs to or it is associated with the object...
#define LIBRARY_STD_FU
standard library where all standard HLS resources are defined
Class specification of the manager of the technology library data structures.
static std::string ComputeSignature(const HLSFlowStep_Type hls_flow_step_type, const HLSFlowStepSpecializationConstRef hls_flow_step_specialization, const unsigned int function_id)
Compute the signature of a hls flow step.
#define RETURN_PORT_NAME
void ComputeRelationships(DesignFlowStepSet &design_flow_step_set, const DesignFlowStep::RelationshipType relationship_type) override
Compute the relationships of a step with other steps.
~TasteInterfaceGeneration() override
Destructor.
#define STR(s)
Macro which performs a lexical_cast to a string.
Auxiliary methods for manipulating string.
virtual void AddParameter(const std::string &name, const std::string &default_value)
Add a parameter.
#define CLOCK_PORT_NAME
standard name for ports
structural_managerRef top
Store the top description.
Definition: hls.hpp:164
bool HasToBeExecuted() const override
Check if this step has actually to be executed.
#define THROW_UNREACHABLE(str_expr)
helper function used to specify that some points should never be reached
Definition: exceptions.hpp:292
Factory for hls flow step.
const CustomUnorderedSet< std::tuple< HLSFlowStep_Type, HLSFlowStepSpecializationConstRef, HLSFlowStep_Relationship > > ComputeHLSRelationships(const DesignFlowStep::RelationshipType relationship_type) const override
Return the set of analyses in relationship with this design step.
#define DONE_PORT_NAME
HLSFlowStep_Type
Definition: hls_step.hpp:95
Class specification of the data structures used to manage technology information. ...
const std::string get_path() const
Return a unique identifier of the structural object.
static bool resize_if_busport(unsigned long long bus_size_bitsize, unsigned long long bus_addr_bitsize, unsigned long long bus_data_bitsize, unsigned long long bus_tag_bitsize, structural_objectRef port)
auxiliary function used to resize the bus ports with respect to their associated bus size ...
Classes to describe design flow graph.
#define index(x, y)
Definition: Keccak.c:74
#define STR_CST_taste_reg_status
The suffix of the reg_status value computation function.
redefinition of set to manage ordered/unordered structures
#define ARRAY_1D_STD_BRAM_NN
utility function used to read files.
const Wrefcount< const DesignFlowManager > design_flow_manager
The design flow manager.
void set_black_box(bool bb)
Set the black box property associated with the structural_object.
void SetParameter(const std::string &name, const std::string &value)
Set a parameter value.
const BehavioralHelperConstRef CGetBehavioralHelper() const
Returns the helper associated with the function.
virtual enum so_kind get_kind() const =0
Virtual function used to find the real type of a structural_object instance.
const ParameterConstRef parameters
Set of input parameters.
DesignFlowStep_Status
The status of a step.
#define STR_CST_taste_endianess_check
The suffix of the endianess check function.
Wrapper of design_flow.
#define STR_CST_taste_data_size
The suffix of the data size function.
refcount< structural_manager > structural_managerRef
RefCount type definition of the structural_manager class structure.
#define STR_CST_taste_endianess_inversion
The suffix of the endianess inversion function.
DesignFlowStepFactoryConstRef CGetDesignFlowStepFactory() const final
Return the factory to create this type of steps.
Definition: hls_step.cpp:407
constants used in taste
#define GET_TYPE_SIZE(structural_obj)
Macro returning the size of the type of a structural object.
refcount< T > lock() const
Definition: refcount.hpp:212
This class describes all classes used to represent a structural object.
#define STR_CST_taste_address_translation
The suffix of the address translation function.
std::string GetPath(std::filesystem::path path)
Definition: fileIO.hpp:140
void set_id(const std::string &s)
Set the identifier associated with the structural_object.
const CustomUnorderedSet< std::tuple< HLSFlowStep_Type, HLSFlowStepSpecializationConstRef, HLSFlowStep_Relationship > > ComputeHLSRelationships(const DesignFlowStep::RelationshipType relationship_type) const override
Return the set of analyses in relationship with this design step.
void AddSignal(const structural_managerRef SM, const structural_objectRef component1, const std::string &port1, const structural_objectRef component2, const std::string &port2, const std::string &signal_name)
Connects two ports by adding a signal.
#define WORK_LIBRARY
working library.
void AddConstant(const structural_managerRef SM, const structural_objectRef component, const std::string &port, const std::string &constant, const unsigned long long size)
Connects a constant to a port.
hlsRef HLS
HLS data structure of the function to be analyzed.
Template borrowed from the ANTLR library by Terence Parr (http://www.jGuru.com - Software rights: htt...
Definition: refcount.hpp:94
DesignFlowStep_Status InternalExec() override
Execute the step.
this class is used to manage the command-line or XML options.
#define RESET_PORT_NAME
Class implementation of the structural_manager.
int debug_level
The debug level.
refcount< const HLSFlowStepSpecialization > HLSFlowStepSpecializationConstRef
const refcount definition of the class
Definition: hls_step.hpp:93
Information about speciaization of add_library.
Definition: add_library.hpp:58
void AddConnection(const structural_managerRef SM, const structural_objectRef component1, const std::string &port1, const structural_objectRef component2, const std::string &port2)
Connects two ports by adding a signal.
#define register_SE
register with synchronous enable
Class generating minimal interfaces.
void add_sign_vector(const structural_managerRef SM, const structural_objectRef sig1, const structural_objectRef sig2, const std::string &sig_name)
Connects two ports by adding a vector signal (i.e., wire)
Data structure definition for high-level synthesis flow.
#define NULL_VERTEX
null vertex definition
Definition: graph.hpp:1305
Datastructure to represent memory information in high-level synthesis.
Class specification of the manager of the tree structures extracted from the raw file.
HLS specialization of generic_device.
std::string get_library(const std::string &Name) const
Return the higher priority library where the given component is stored.
#define THROW_ASSERT(cond, str_expr)
helper function used to check an assert and if needed to throw an error in a standard way ...
Definition: exceptions.hpp:289

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