PandA-2024.02
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This class writes different HDL based descriptions (VHDL, Verilog, SystemC) starting from a structural representation. More...
#include "config_HAVE_FROM_C_BUILT.hpp"
#include "custom_set.hpp"
#include "dbgPrintHelper.hpp"
#include "refcount.hpp"
#include <list>
#include <map>
#include <set>
#include <string>
#include <vector>
Go to the source code of this file.
Data Structures | |
class | language_writer |
HDL writer base class used to specify the interface of the different language writers. More... | |
Macros | |
#define | BITSIZE_PREFIX "BITSIZE_" |
#define | PORTSIZE_PREFIX "PORTSIZE_" |
#define | NUM_ELEM_PREFIX "NUM_ELEM_" |
Typedefs | |
using | language_writerRef = refcount< language_writer > |
RefCount definition of the class. More... | |
Enumerations | |
enum | HDLWriter_Language { HDLWriter_Language::VERILOG = 0, HDLWriter_Language::SYSTEM_VERILOG, HDLWriter_Language::VHDL } |
Functions | |
Forward declarations. | |
Autoheader include utility include | |
REF_FORWARD_DECL (IndentedOutputStream) | |
REF_FORWARD_DECL (language_writer) | |
CONSTREF_FORWARD_DECL (Parameter) | |
REF_FORWARD_DECL (structural_type_descriptor) | |
CONSTREF_FORWARD_DECL (structural_object) | |
REF_FORWARD_DECL (structural_object) | |
CONSTREF_FORWARD_DECL (technology_manager) | |
This class writes different HDL based descriptions (VHDL, Verilog, SystemC) starting from a structural representation.
Definition in file language_writer.hpp.
#define BITSIZE_PREFIX "BITSIZE_" |
Definition at line 75 of file language_writer.hpp.
Referenced by verilog_writer::may_slice_string(), VHDL_writer::may_slice_string(), verilog_writer::type_converter_size(), VHDL_writer::type_converter_size(), VHDL_writer::write_module_parametrization(), verilog_writer::write_module_parametrization(), VHDL_writer::write_module_parametrization_decl(), and verilog_writer::write_module_parametrization_decl().
#define NUM_ELEM_PREFIX "NUM_ELEM_" |
Definition at line 77 of file language_writer.hpp.
Referenced by verilog_writer::may_slice_string(), VHDL_writer::may_slice_string(), verilog_writer::type_converter_size(), VHDL_writer::type_converter_size(), VHDL_writer::write_module_parametrization(), verilog_writer::write_module_parametrization(), VHDL_writer::write_module_parametrization_decl(), and verilog_writer::write_module_parametrization_decl().
#define PORTSIZE_PREFIX "PORTSIZE_" |
Definition at line 76 of file language_writer.hpp.
Referenced by verilog_writer::type_converter_size(), VHDL_writer::type_converter_size(), VHDL_writer::write_module_parametrization(), verilog_writer::write_module_parametrization(), VHDL_writer::write_module_parametrization_decl(), and verilog_writer::write_module_parametrization_decl().
using language_writerRef = refcount<language_writer> |
RefCount definition of the class.
Definition at line 353 of file language_writer.hpp.
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Enumerator | |
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VERILOG | |
SYSTEM_VERILOG | |
VHDL |
Definition at line 78 of file language_writer.hpp.
CONSTREF_FORWARD_DECL | ( | Parameter | ) |
CONSTREF_FORWARD_DECL | ( | structural_object | ) |
CONSTREF_FORWARD_DECL | ( | technology_manager | ) |
REF_FORWARD_DECL | ( | IndentedOutputStream | ) |
REF_FORWARD_DECL | ( | language_writer | ) |
REF_FORWARD_DECL | ( | structural_type_descriptor | ) |
REF_FORWARD_DECL | ( | structural_object | ) |