PandA-2024.02
VHDL_writer.hpp
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44 #ifndef VHDL_WRITER_HPP
45 #define VHDL_WRITER_HPP
46 #include "language_writer.hpp"
47 
48 #include "custom_set.hpp"
49 #include <list>
50 #include <set>
51 #include <string>
52 #include <vector>
53 
55 {
56  protected:
57  static const std::set<std::string> keywords;
58 
60 
62  const technology_managerConstRef TM;
63 
64  public:
65  static bool check_keyword_vhdl(const std::string& id);
66 
70  std::string get_name() const override
71  {
72  return "VHDL";
73  }
77  std::string get_extension() const override
78  {
79  return ".vhd";
80  }
85  void write_comment(const std::string& comment_string) override;
90  std::string type_converter(structural_type_descriptorRef Type) override;
96  std::string type_converter_size(const structural_objectRef& cir) override;
97 
103  std::string may_slice_string(const structural_objectRef& cir);
104 
109  void write_library_declaration(const structural_objectRef& cir) override;
114  void write_module_declaration(const structural_objectRef& cir) override;
124  void write_port_declaration(const structural_objectRef& cir, bool last_port_to_analyze) override;
129  void write_component_declaration(const structural_objectRef& cir) override;
134  void write_signal_declaration(const structural_objectRef& cir) override;
139  void write_module_definition_begin(const structural_objectRef& cir) override;
146  void write_module_instance_begin(const structural_objectRef& cir, const std::string& module_name,
147  bool write_parametrization) override;
152  void write_module_instance_end(const structural_objectRef& cir) override;
158  void write_port_binding(const structural_objectRef& port, const structural_objectRef& object_bounded,
159  bool first_port_analyzed) override;
160  void write_vector_port_binding(const structural_objectRef& port, bool first_port_analyzed) override;
165  void write_module_definition_end(const structural_objectRef& cir) override;
171  void write_io_signal_post_fix(const structural_objectRef& port, const structural_objectRef& sig) override;
172  void write_io_signal_post_fix_vector(const structural_objectRef& port, const structural_objectRef& sig) override;
182  void write_module_parametrization(const structural_objectRef& cir) override;
187  void write_state_declaration(const structural_objectRef& cir, const std::list<std::string>& list_of_states,
188  const std::string& reset_port, const std::string& reset_state, bool one_hot) override;
196  void write_present_state_update(const structural_objectRef cir, const std::string& reset_state,
197  const std::string& reset_port, const std::string& clock_port,
198  const std::string& reset_type, bool connect_present_next_state_signals) override;
199 
210  bool single_proc, unsigned int output_index, const structural_objectRef& cir, const std::string& reset_state,
211  const std::string& reset_port, const std::string& start_port, const std::string& clock_port,
212  std::vector<std::string>::const_iterator& first, std::vector<std::string>::const_iterator& end, bool,
213  const std::map<unsigned int, std::map<std::string, std::set<unsigned int>>>& bypass_signals) override;
214 
219  void write_NP_functionalities(const structural_objectRef& cir) override;
220 
221  void write_assign(const std::string& op0, const std::string& op1) override;
222 
226  void write_port_decl_header() override;
227 
231  void write_port_decl_tail() override;
232 
237 
243  VHDL_writer(const technology_managerConstRef TM, const ParameterConstRef parameters);
244 
248  ~VHDL_writer() override;
249 
250  bool has_output_prefix() const override
251  {
252  return true;
253  }
254 
255  bool check_keyword(const std::string&) const override;
256 
261  void WriteBuiltin(const structural_objectConstRef component) override;
262 
266  void write_header() override;
267 };
268 #endif
void write_library_declaration(const structural_objectRef &cir) override
Write used library.
void write_module_parametrization_decl(const structural_objectRef &cir) override
Write the declaration of the module parameters.
void write_module_parametrization(const structural_objectRef &cir) override
Module can be parametrized with respect different features.
void write_port_decl_header() override
Write the header for port_decl.
static const std::set< std::string > keywords
Definition: VHDL_writer.hpp:57
void write_vector_port_binding(const structural_objectRef &port, bool first_port_analyzed) override
std::string get_name() const override
Return the name of the language writer.
Definition: VHDL_writer.hpp:70
void write_module_instance_begin(const structural_objectRef &cir, const std::string &module_name, bool write_parametrization) override
Write the initial part of the instance of a module.
~VHDL_writer() override
Destructor.
std::string type_converter(structural_type_descriptorRef Type) override
Return a language based type string given a structural_type_descriptor.
Definition: VHDL_writer.cpp:94
void write_transition_output_functions(bool single_proc, unsigned int output_index, const structural_objectRef &cir, const std::string &reset_state, const std::string &reset_port, const std::string &start_port, const std::string &clock_port, std::vector< std::string >::const_iterator &first, std::vector< std::string >::const_iterator &end, bool, const std::map< unsigned int, std::map< std::string, std::set< unsigned int >>> &bypass_signals) override
Write the transition and output functions.
void write_module_internal_declaration(const structural_objectRef &cir) override
Write the declaration of internal objects of the module.
VHDL_writer(const technology_managerConstRef TM, const ParameterConstRef parameters)
Constructor.
Definition: VHDL_writer.cpp:81
void write_module_instance_end(const structural_objectRef &cir) override
Write the ending part of the instance of a module.
void write_module_declaration(const structural_objectRef &cir) override
Write the declaration of the module.
void write_io_signal_post_fix(const structural_objectRef &port, const structural_objectRef &sig) override
Write some code managing primary ports to signals connections.
void write_header() override
Write the header of vhdl file.
unsigned map[NUM_VERTICES]
Definition: bfs.c:12
bool has_output_prefix() const override
void write_comment(const std::string &comment_string) override
Print a comment.
Definition: VHDL_writer.cpp:89
This class writes different HDL based descriptions (VHDL, Verilog, SystemC) starting from a structura...
redefinition of set to manage ordered/unordered structures
std::string get_extension() const override
Return the filename extension associated with the VHDL_writer.
Definition: VHDL_writer.hpp:77
void write_state_declaration(const structural_objectRef &cir, const std::list< std::string > &list_of_states, const std::string &reset_port, const std::string &reset_state, bool one_hot) override
write the declaration of all the states of the finite state machine.
static bool check_keyword_vhdl(const std::string &id)
void WriteBuiltin(const structural_objectConstRef component) override
Write a builtin component.
void write_component_declaration(const structural_objectRef &cir) override
Write the declaration of a component.
void write_assign(const std::string &op0, const std::string &op1) override
void write_io_signal_post_fix_vector(const structural_objectRef &port, const structural_objectRef &sig) override
void write_present_state_update(const structural_objectRef cir, const std::string &reset_state, const std::string &reset_port, const std::string &clock_port, const std::string &reset_type, bool connect_present_next_state_signals) override
write the present_state update process
void write_port_decl_tail() override
Write the tail for port_decl.
std::string type_converter_size(const structural_objectRef &cir) override
Return a language based type string given a structural_type_descriptor for the range of the array...
CustomOrderedSet< std::string > list_of_comp_already_def
Definition: VHDL_writer.hpp:59
const ParameterConstRef parameters
the set of input parameters
void write_module_definition_end(const structural_objectRef &cir) override
Write the end part in a module declaration.
HDL writer base class used to specify the interface of the different language writers.
void write_port_binding(const structural_objectRef &port, const structural_objectRef &object_bounded, bool first_port_analyzed) override
Write the binding of a port.
void write_signal_declaration(const structural_objectRef &cir) override
Write the declaration of a signal.
const technology_managerConstRef TM
The technology manager.
Definition: VHDL_writer.hpp:62
std::string may_slice_string(const structural_objectRef &cir)
return the slice in case of a port owned by a port vector
bool check_keyword(const std::string &) const override
void write_module_definition_begin(const structural_objectRef &cir) override
Write the top constructor declaration.
void write_NP_functionalities(const structural_objectRef &cir) override
Write in the proper language the behavioral description of the module described in "Not Parsed" form...
void write_port_declaration(const structural_objectRef &cir, bool last_port_to_analyze) override
Write the port declaration starting from a port object.

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