PandA-2024.02
controller_creator_base_step.cpp
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41 
42 #include "BambuParameter.hpp"
43 #include "behavioral_helper.hpp"
44 #include "commandport_obj.hpp"
45 #include "dbgPrintHelper.hpp"
46 #include "exceptions.hpp"
47 #include "fsm_controller.hpp"
48 #include "function_behavior.hpp"
49 #include "hls.hpp"
50 #include "hls_manager.hpp"
51 #include "multi_unbounded_obj.hpp"
52 #include "structural_manager.hpp"
53 #include "structural_objects.hpp"
54 #include "technology_manager.hpp"
55 #include "utility.hpp"
56 
58  unsigned int _funId,
59  const DesignFlowManagerConstRef _design_flow_manager,
60  const HLSFlowStep_Type _hls_flow_step_type)
61  : HLSFunctionStep(_Param, _HLSMgr, _funId, _design_flow_manager, _hls_flow_step_type), out_num(0), in_num(0)
62 {
63 }
64 
66 
69 {
71  switch(relationship_type)
72  {
74  {
75  ret.insert(std::make_tuple(parameters->getOption<HLSFlowStep_Type>(OPT_datapath_architecture),
77  break;
78  }
80  {
81  break;
82  }
84  {
85  break;
86  }
87  default:
89  }
90  return ret;
91 }
92 
94 {
98  THROW_ASSERT(this->HLS->Rsch, "Scheduling not performed");
99  THROW_ASSERT(this->HLS->Rreg, "Register allocation not performed");
100  THROW_ASSERT(this->HLS->Rconn, "Interconnection allocation not performed");
101 
102  // reference to the HLS controller circuit
104  out_ports.clear();
105  cond_ports.clear();
106  out_num = 0;
107  in_num = 0;
108 }
109 
111 {
112  PRINT_DBG_MEX(DEBUG_LEVEL_PEDANTIC, debug_level, "Adding the done port...");
113  this->add_done_port(circuit, SM);
114 
115  this->add_command_ports(circuit, SM);
116 
117  PRINT_DBG_MEX(DEBUG_LEVEL_PEDANTIC, debug_level, "Adding clock and reset ports...");
118  this->add_clock_reset(circuit, SM);
119 
120  PRINT_DBG_MEX(DEBUG_LEVEL_PEDANTIC, debug_level, "Adding the start port...");
121  this->add_start_port(circuit, SM);
122 }
123 
125 {
128 
129  PRINT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, " * Start adding clock signal...");
131  structural_objectRef clock_obj = SM->add_port(CLOCK_PORT_NAME, port_o::IN, circuit, port_type);
132  GetPointer<port_o>(clock_obj)->set_is_clock(true);
134  PRINT_DBG_MEX(DEBUG_LEVEL_PEDANTIC, debug_level, " - Clock signal added!");
135 
136  PRINT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, " * Start adding reset signal...");
138  SM->add_port(RESET_PORT_NAME, port_o::IN, circuit, port_type);
139  PRINT_DBG_MEX(DEBUG_LEVEL_PEDANTIC, debug_level, " - Reset signal added!");
140 }
141 
143 {
146  PRINT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, " * Start adding Done signal...");
148  SM->add_port(DONE_PORT_NAME, port_o::OUT, circuit, port_type);
149  PRINT_DBG_MEX(DEBUG_LEVEL_PEDANTIC, debug_level, " - Done signal added!");
150 }
151 
153 {
156  PRINT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, " * Start adding start signal...");
158  SM->add_port(START_PORT_NAME, port_o::IN, circuit, port_type);
159  PRINT_DBG_MEX(DEBUG_LEVEL_PEDANTIC, debug_level, " - Start signal added!");
160 }
161 
163 {
164  INDENT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, "-->Adding command ports");
165 
168  const FunctionBehaviorConstRef FB = HLSMgr->CGetFunctionBehavior(funId);
169 
170  out_num = 0;
171  in_num = 0;
172  const auto& selectors = HLS->Rconn->GetSelectors();
174  "---Adding " + std::to_string(selectors.size()) + " selectors");
175  for(const auto& selector : selectors)
176  {
177  for(const auto& j : selector.second)
178  {
180  if(selector.first == conn_binding::IN)
181  {
183  if(GetPointer<commandport_obj>(j.second)->get_command_type() == commandport_obj::OPERATION)
184  {
185  continue;
186  }
188  structural_objectRef sel_obj =
189  SM->add_port(j.second->get_structural_obj()->get_id(), port_o::OUT, circuit, bool_type);
190  GetPointer<commandport_obj>(j.second)->set_controller_obj(sel_obj);
191  out_ports[j.second] = out_num++;
192  }
194  if(selector.first == conn_binding::OUT)
195  {
196  INDENT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, "---Connection from datapath to controller");
197  structural_objectRef sel_obj;
198  if(GetPointer<commandport_obj>(j.second)->get_command_type() == commandport_obj::MULTI_UNBOUNDED)
199  {
200  sel_obj =
201  SM->add_port(GetPointer<commandport_obj>(j.second)->get_string(), port_o::IN, circuit, bool_type);
202  auto mu_obj = GetPointer<commandport_obj>(j.second)->get_elem();
203  THROW_ASSERT(GetPointer<multi_unbounded_obj>(mu_obj), "unexpected condition");
204  mu_ports[GetPointer<multi_unbounded_obj>(mu_obj)->get_fsm_state()] = in_num;
205  }
206  else
207  {
209  vertex cond_v = GetPointer<commandport_obj>(j.second)->get_vertex();
210  if(GetPointer<commandport_obj>(j.second)->get_command_type() == commandport_obj::SWITCH)
211  {
213  unsigned int var_written = HLSMgr->get_produced_value(HLS->functionId, cond_v);
215  new structural_type_descriptor(var_written, FB->CGetBehavioralHelper()));
216  sel_obj = SM->add_port(GetPointer<commandport_obj>(j.second)->get_string(), port_o::IN, circuit,
217  switch_port_type);
218  }
219  else if(GetPointer<commandport_obj>(j.second)->get_command_type() == commandport_obj::MULTIIF)
220  {
221  std::vector<HLS_manager::io_binding_type> var_read =
222  HLSMgr->get_required_values(HLS->functionId, cond_v);
223  auto vect_size = static_cast<unsigned int>(var_read.size());
224  structural_type_descriptorRef multiif_port_type =
226  sel_obj = SM->add_port(GetPointer<commandport_obj>(j.second)->get_string(), port_o::IN, circuit,
227  multiif_port_type);
228  }
229  else
230  {
232  sel_obj =
233  SM->add_port(GetPointer<commandport_obj>(j.second)->get_string(), port_o::IN, circuit, bool_type);
234  }
235  cond_ports[cond_v] = in_num;
236  }
237  GetPointer<commandport_obj>(j.second)->set_controller_obj(sel_obj);
238  in_num++;
239  }
240  }
241  }
242 
243  INDENT_DBG_MEX(DEBUG_LEVEL_VERY_PEDANTIC, debug_level, "<--Command ports added!");
244 }
const CustomUnorderedSet< std::tuple< HLSFlowStep_Type, HLSFlowStepSpecializationConstRef, HLSFlowStep_Relationship > > ComputeHLSRelationships(const DesignFlowStep::RelationshipType relationship_type) const override
Return the set of analyses in relationship with this design step.
void Initialize() override
Initialize the step (i.e., like a constructor, but executed just before exec.
#define DEBUG_LEVEL_VERY_PEDANTIC
extremely verbose debugging print is performed.
const HLS_managerRef HLSMgr
information about all the HLS synthesis
Definition: hls_step.hpp:205
Data structure representing the entire HLS information.
#define INDENT_DBG_MEX(dbgLevel, curDbgLevel, mex)
We are producing a debug version of the program, so the message is printed;.
refcount< structural_type_descriptor > structural_type_descriptorRef
RefCount type definition of the structural_type_descriptor class structure.
File containing functions and utilities to support the printing of debug messagges.
Base class for all unbounded objects added to datapath.
#define PRINT_DBG_MEX(dbgLevel, curDbgLevel, mex)
We are producing a debug version of the program, so the message is printed;.
#define DEBUG_LEVEL_PEDANTIC
very verbose debugging print is performed.
#define START_PORT_NAME
Structure representing the most relevant information about the type of a structural object...
const ParameterConstRef Param
class containing all the parameters
Definition: hls.hpp:169
Base class for all command ports into datapath.
void Initialize() override
Initialize the step (i.e., like a constructor, but executed just before exec.
void add_clock_reset(structural_objectRef circuit, structural_managerRef SM)
Adds the clock and reset ports to a circuit.
virtual void add_common_ports(structural_objectRef circuit, structural_managerRef SM)
This member function adds the standard ports (clock, reset, done and command ones) to a circuit...
void add_done_port(structural_objectRef circuit, structural_managerRef SM)
Adds the done port to a circuit.
RelationshipType
The relationship type.
const std::map< unsigned int, Selectors > & GetSelectors() const
Source must be executed to satisfy target.
Header class for the creation of the classical FSM controller.
const unsigned int funId
identifier of the function to be processed (0 means that it is a global step)
This class manages the circuit structures.
exceptions managed by PandA
void add_command_ports(structural_objectRef circuit, structural_managerRef SM)
Adds the command ports to a circuit.
ControllerCreatorBaseStep(const ParameterConstRef Param, const HLS_managerRef HLSMgr, unsigned int funId, const DesignFlowManagerConstRef design_flow_manager, const HLSFlowStep_Type hls_flow_step_type)
Constructor.
Class specification of the manager of the technology library data structures.
std::map< vertex, unsigned int > cond_ports
This is the same as in_ports except that the first element is of type vertex.
~ControllerCreatorBaseStep() override
Destructor.
#define CLOCK_PORT_NAME
standard name for ports
unsigned int in_num
Initialized after add_common_ports is called. It represents the current number of input ports...
#define THROW_UNREACHABLE(str_expr)
helper function used to specify that some points should never be reached
Definition: exceptions.hpp:292
ScheduleRef Rsch
Store the refcounted scheduling of the operations.
Definition: hls.hpp:118
#define DONE_PORT_NAME
unsigned int out_num
Initialized after add_common_ports is called. It represents the current number of output ports...
HLSFlowStep_Type
Definition: hls_step.hpp:95
static structural_objectRef add_port(const std::string &id, port_o::port_direction pdir, structural_objectRef owner, structural_type_descriptorRef type_descr, unsigned int treenode=0)
Create a new port.
boost::graph_traits< graph >::vertex_descriptor vertex
vertex definition.
Definition: graph.hpp:1303
Base class for all the controller creation algorithms.
const BehavioralHelperConstRef CGetBehavioralHelper() const
Returns the helper associated with the function.
const ParameterConstRef parameters
Set of input parameters.
std::map< generic_objRef, unsigned int > out_ports
This contains all the ports that go from the controller to the datapath, used to enable the registers...
This file collects some utility functions and macros.
reg_bindingRef Rreg
Store the refcounted register binding of the variables.
Definition: hls.hpp:133
refcount< structural_manager > structural_managerRef
RefCount type definition of the structural_manager class structure.
void add_start_port(structural_objectRef circuit, structural_managerRef SM)
Adds the start port to a circuit.
structural_managerRef controller
Store the controller description.
Definition: hls.hpp:158
This class describes all classes used to represent a structural object.
hlsRef HLS
HLS data structure of the function to be analyzed.
Template borrowed from the ANTLR library by Terence Parr (http://www.jGuru.com - Software rights: htt...
Definition: refcount.hpp:94
unsigned int functionId
this is the identifier of the function to be implemented
Definition: hls.hpp:87
#define RESET_PORT_NAME
Class implementation of the structural_manager.
int debug_level
The debug level.
Data structure definition for high-level synthesis flow.
Superclass include.
conn_bindingRef Rconn
Store the refcounted interconnection of datapath elements.
Definition: hls.hpp:139
A brief description of the C++ Header File.
std::map< vertex, unsigned int > mu_ports
This map put into relation fsm states and alldone multi_unbounded ports.
#define THROW_ASSERT(cond, str_expr)
helper function used to check an assert and if needed to throw an error in a standard way ...
Definition: exceptions.hpp:289

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