59 const DesignFlowManagerConstRef _design_flow_manager,
61 :
HLSFunctionStep(_Param, _HLSMgr, _funId, _design_flow_manager, _hls_flow_step_type), out_num(0), in_num(0)
71 switch(relationship_type)
132 GetPointer<port_o>(clock_obj)->set_is_clock(
true);
174 "---Adding " + std::to_string(selectors.size()) +
" selectors");
175 for(
const auto& selector : selectors)
177 for(
const auto& j : selector.second)
180 if(selector.first == conn_binding::IN)
183 if(GetPointer<commandport_obj>(j.second)->get_command_type() == commandport_obj::OPERATION)
189 SM->
add_port(j.second->get_structural_obj()->get_id(), port_o::OUT, circuit, bool_type);
190 GetPointer<commandport_obj>(j.second)->set_controller_obj(sel_obj);
194 if(selector.first == conn_binding::OUT)
198 if(GetPointer<commandport_obj>(j.second)->get_command_type() == commandport_obj::MULTI_UNBOUNDED)
201 SM->
add_port(GetPointer<commandport_obj>(j.second)->get_string(), port_o::IN, circuit, bool_type);
202 auto mu_obj = GetPointer<commandport_obj>(j.second)->get_elem();
203 THROW_ASSERT(GetPointer<multi_unbounded_obj>(mu_obj),
"unexpected condition");
204 mu_ports[GetPointer<multi_unbounded_obj>(mu_obj)->get_fsm_state()] =
in_num;
209 vertex cond_v = GetPointer<commandport_obj>(j.second)->get_vertex();
210 if(GetPointer<commandport_obj>(j.second)->get_command_type() == commandport_obj::SWITCH)
216 sel_obj = SM->
add_port(GetPointer<commandport_obj>(j.second)->get_string(), port_o::IN, circuit,
219 else if(GetPointer<commandport_obj>(j.second)->get_command_type() == commandport_obj::MULTIIF)
221 std::vector<HLS_manager::io_binding_type> var_read =
223 auto vect_size =
static_cast<unsigned int>(var_read.size());
226 sel_obj = SM->
add_port(GetPointer<commandport_obj>(j.second)->get_string(), port_o::IN, circuit,
233 SM->
add_port(GetPointer<commandport_obj>(j.second)->get_string(), port_o::IN, circuit, bool_type);
237 GetPointer<commandport_obj>(j.second)->set_controller_obj(sel_obj);
const CustomUnorderedSet< std::tuple< HLSFlowStep_Type, HLSFlowStepSpecializationConstRef, HLSFlowStep_Relationship > > ComputeHLSRelationships(const DesignFlowStep::RelationshipType relationship_type) const override
Return the set of analyses in relationship with this design step.
void Initialize() override
Initialize the step (i.e., like a constructor, but executed just before exec.
#define DEBUG_LEVEL_VERY_PEDANTIC
extremely verbose debugging print is performed.
const HLS_managerRef HLSMgr
information about all the HLS synthesis
Data structure representing the entire HLS information.
#define INDENT_DBG_MEX(dbgLevel, curDbgLevel, mex)
We are producing a debug version of the program, so the message is printed;.
refcount< structural_type_descriptor > structural_type_descriptorRef
RefCount type definition of the structural_type_descriptor class structure.
File containing functions and utilities to support the printing of debug messagges.
Base class for all unbounded objects added to datapath.
#define PRINT_DBG_MEX(dbgLevel, curDbgLevel, mex)
We are producing a debug version of the program, so the message is printed;.
#define DEBUG_LEVEL_PEDANTIC
very verbose debugging print is performed.
Structure representing the most relevant information about the type of a structural object...
const ParameterConstRef Param
class containing all the parameters
Base class for all command ports into datapath.
void Initialize() override
Initialize the step (i.e., like a constructor, but executed just before exec.
void add_clock_reset(structural_objectRef circuit, structural_managerRef SM)
Adds the clock and reset ports to a circuit.
virtual void add_common_ports(structural_objectRef circuit, structural_managerRef SM)
This member function adds the standard ports (clock, reset, done and command ones) to a circuit...
void add_done_port(structural_objectRef circuit, structural_managerRef SM)
Adds the done port to a circuit.
RelationshipType
The relationship type.
const std::map< unsigned int, Selectors > & GetSelectors() const
Source must be executed to satisfy target.
Header class for the creation of the classical FSM controller.
const unsigned int funId
identifier of the function to be processed (0 means that it is a global step)
This class manages the circuit structures.
exceptions managed by PandA
void add_command_ports(structural_objectRef circuit, structural_managerRef SM)
Adds the command ports to a circuit.
ControllerCreatorBaseStep(const ParameterConstRef Param, const HLS_managerRef HLSMgr, unsigned int funId, const DesignFlowManagerConstRef design_flow_manager, const HLSFlowStep_Type hls_flow_step_type)
Constructor.
Class specification of the manager of the technology library data structures.
std::map< vertex, unsigned int > cond_ports
This is the same as in_ports except that the first element is of type vertex.
~ControllerCreatorBaseStep() override
Destructor.
#define CLOCK_PORT_NAME
standard name for ports
unsigned int in_num
Initialized after add_common_ports is called. It represents the current number of input ports...
#define THROW_UNREACHABLE(str_expr)
helper function used to specify that some points should never be reached
ScheduleRef Rsch
Store the refcounted scheduling of the operations.
unsigned int out_num
Initialized after add_common_ports is called. It represents the current number of output ports...
static structural_objectRef add_port(const std::string &id, port_o::port_direction pdir, structural_objectRef owner, structural_type_descriptorRef type_descr, unsigned int treenode=0)
Create a new port.
Target must be reexecuted.
boost::graph_traits< graph >::vertex_descriptor vertex
vertex definition.
Base class for all the controller creation algorithms.
const BehavioralHelperConstRef CGetBehavioralHelper() const
Returns the helper associated with the function.
const ParameterConstRef parameters
Set of input parameters.
std::map< generic_objRef, unsigned int > out_ports
This contains all the ports that go from the controller to the datapath, used to enable the registers...
This file collects some utility functions and macros.
reg_bindingRef Rreg
Store the refcounted register binding of the variables.
refcount< structural_manager > structural_managerRef
RefCount type definition of the structural_manager class structure.
void add_start_port(structural_objectRef circuit, structural_managerRef SM)
Adds the start port to a circuit.
structural_managerRef controller
Store the controller description.
This class describes all classes used to represent a structural object.
hlsRef HLS
HLS data structure of the function to be analyzed.
Template borrowed from the ANTLR library by Terence Parr (http://www.jGuru.com - Software rights: htt...
unsigned int functionId
this is the identifier of the function to be implemented
Class implementation of the structural_manager.
int debug_level
The debug level.
Data structure definition for high-level synthesis flow.
conn_bindingRef Rconn
Store the refcounted interconnection of datapath elements.
A brief description of the C++ Header File.
std::map< vertex, unsigned int > mu_ports
This map put into relation fsm states and alldone multi_unbounded ports.
#define THROW_ASSERT(cond, str_expr)
helper function used to check an assert and if needed to throw an error in a standard way ...